SanDisk SDSDB-32-201-80 - Industrial Grade Flash Memory Card Manual Page 5
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Table of Contents
SanDisk Industrial Grade SD Product Manual, Rev. 1.0 © 2003 SANDISK CORPORATION -v
4.11.3. Data Write............................................................................................................................. 4-29
4.11.4. Timing Values....................................................................................................................... 4-32
5. SPI Protocol Definition ...................................................................................................................................... 5-1
5.1. SPI Bus Protocol ............................................................................................................................... 5-1
5.1.1. Mode Selection ....................................................................................................................... 5-1
5.1.2. Bus Transfer Protection .......................................................................................................... 5-2
5.1.3. Data Read................................................................................................................................ 5-2
5.1.4. Data Write............................................................................................................................... 5-3
5.1.5. Erase and Write Protect Management..................................................................................... 5-4
5.1.6. Read CID/CSD Registers........................................................................................................ 5-4
5.1.7. Reset Sequence ....................................................................................................................... 5-5
5.1.8. Clock Control.......................................................................................................................... 5-5
5.1.9. Error Conditions...................................................................................................................... 5-6
5.1.9.1. CRC and Illegal Commands .................................................................................. 5-6
5.1.9.2. Read, Write and Erase Time-out Conditions ......................................................... 5-6
5.1.10. Memory Array Partitioning................................................................................................... 5-7
5.1.11. Card Lock/Unlock................................................................................................................. 5-7
5.1.12. Application Specific Commands...........................................................................................5-7
5.1.13. Copyright Protection Commands.......................................................................................... 5-7
5.2. SPI Command Set ............................................................................................................................. 5-7
5.2.1. Command Format.................................................................................................................... 5-7
5.2.2. Command Classes ................................................................................................................... 5-8
5.2.2.1. Detailed Command Description............................................................................. 5-8
5.2.3. Responses................................................................................................................................ 5-11
5.2.3.1. Format R1 ..............................................................................................................5-12
5.2.3.2. Format R1b ............................................................................................................ 5-12
5.2.3.3. Format R2 ..............................................................................................................5-12
5.2.3.4. Format R3 ..............................................................................................................5-13
5.2.3.5. Data Response ....................................................................................................... 5-14
5.2.4. Data Tokens ............................................................................................................................ 5-14
5.2.5. Data Error Token .................................................................................................................... 5-15
5.2.6. Clearing Status Bits................................................................................................................. 5-15
5.3. Card Registers ................................................................................................................................... 5-15
5.4. SPI Bus Timing Diagrams................................................................................................................. 5-15
5.4.1. Command/Response................................................................................................................ 5-16
5.4.2. Data Read................................................................................................................................ 5-17
5.4.3. Data Write............................................................................................................................... 5-17
5.4.4. Timing Values......................................................................................................................... 5-18
5.5. SPI Electrical Interface...................................................................................................................... 5-18
5.6. SPI Bus Operating Conditions .......................................................................................................... 5-18
5.7. Bus Timing........................................................................................................................................ 5-18
Appendix A. Application Note............................................................................................................................... A-1
Host Design Considerations: NAND MMC and SD-based Products ...................................................... A-1
Introduction.............................................................................................................................................. A-1
Timing...................................................................................................................................................... A-1
Timing specifications ............................................................................................................................... A-1
Read access and program times................................................................................................................ A-1
Interface.................................................................................................................................................... A-2
Read/Write Mode Selection ..................................................................................................................... A-4
Power and Clock Control ......................................................................................................................... A-4
Initialization Algorithm............................................................................................................................ A-5
- Product Manual 1
- Table of Contents 3
- Table of Contents 5
- 1.1. Scope 8
- 1.2. Product Models 8
- 1.3. System Features 8
- 1.4. SD Card Standard 9
- 1.5. Functional Description 9
- 1.5.10.9. Write Protection 18
- Same as in SD Card mode 18
- 2. Product Specifications 21
- 2.4. System Performance 22
- 2.6. Physical Specifications 23
- Product Specifications 24
- Product Specifications 25
- (2) I Reserved 28
- 3.2. SD Bus Topology 29
- 3.3. SPI Bus Topology 31
- 3.4. Electrical Interface 32
- 3.4.5. Bus Timing 36
- Table 3-7. Bus Timing 36
- • Card busy=LOW (bit 31) 38
- READ_BL_LEN 42
- C_SIZE_MULT+2 43
- WRITE_BL_LEN 44
- Prot 2, Spec V1.01 46
- Table 3-28. Card Status 48
- 4.1. SD Bus Protocol 53
- SPI Operation 58
- CS Asserted ("0") 58
- Note that ACMD41 is an 59
- 4.4. Data Transfer Mode 60
- 4.5. Clock Control 66
- 100KHz-400KHz Clocks 67
- 4.7. Error Conditions 69
- 4.8. Commands 70
- Reserved 71
- 4.10. Responses 77
- 4.11. Timings 79
- 4.11.4. Timing Values 84
- Table 4-17. Timing Values 84
- 5. SPI Protocol Definition 85
- 5.3. Card Registers 99
- 5.4. SPI Bus Timing Diagrams 99
- SPI Protocol Definition 100
- SPI Protocol Definition 101
- Appendix A. Application Note 105
- Interface 106
- Read/Write Mode Selection 108
- Power and Clock Control 108
- Initialization Algorithm 109
- File System Support 109
- Application Note 110
- Ordering Information 112
- Limited Warranty 116
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